Advanced Packaging, SI/PI Principal Engineer

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

You will be responsible for the following:

• SI/PI analysis of designs and optimization within 2D/2.5D/3D packages

• Interfacing with product design teams and clients for optimized floor-planning, package substrate design, and power delivery network design

• Perform wiring studies in order to determine optimal signal routing, power delivery verification and package size determination

• Training and mentoring within a growing team of Signal and Power Integrity engineers

Primary job location is Burlington, VT, with options for Westborough, MA or Boise, ID. Job requires being on-site in office 5 days per week.

What We're Looking For

The ideal candidate will have an interest in hardware design and experience working on signal and power integrity verification and design optimization. People and/or team leadership is a strong plus. A knowledge of Electrical Engineering concepts, circuit extractions and simulation, as well as design methodology and strategies is required. In addition, the candidate will possess a bachelor's degree in electrical engineering or related fields and 10+ years of related professional experience in package or PCB design, or master's degree and/or PhD in Electrical Engineering with coursework in signal integrity and power delivery and 8+ years of experience.

Marvell is looking for an expert with demonstrated success in the following areas:

• Evaluating package or PCB designs for challenging electrical requirements

• Close interaction with physical designers and IP teams to optimize electrical performance

• Executing simulation tasks for signal and power integrity sign-off

Skills needed to be successful in this role:

• Understanding of signal integrity and power integrity concepts and fundamentals

• Experience in package development, including interposer design

• People management or technical leadership

• Experience with EDA simulation tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity tools

• Familiarity with packaging technologies, materials, package substrate design rules and assembly rules

• Experience with simulation and analysis using tools like PowerSI, SIwave

• Working knowledge of circuit extractions and simulations

• Ability to work with engineers in multiple locations and geographies

• Strong communication, presentation and documentation skills

The ideal candidate would have:

• Board and system level signal and power integrity analysis

• Good understanding of interposer, substrate, package, PCB level design rules, ability to perform routing feasibility studies using Cadence APD or PCB editor.

• Understanding of signal and power integrity for 2.5D/3D packages including (a) CoWoS-S/R/L, (b) EMIB, (c) CPO, (d) CPC

• Ability to manage programs involving cross-functional teams. Strong interpersonal skills and willingness to learn new things are necessary along with the ability to work with stakeholders in multiple time zones across the globe.

• Interested in being a leader in growing team

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.