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Senior Manager - Design Engineering

Microchip Technology Inc
United States, Arizona, Chandler
2355 West Chandler Boulevard (Show on map)
Oct 31, 2025

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

The Wireless Solutions Group is seeking an experienced Engineering Manager to lead our portfolio of 32-bit microcontroller-based Bluetooth and Wi-Fi products. In this role, you will drive execution of next-generation, high-performance, low-power wireless SoC and attach solutions. You will provide technical leadership and manage globally distributed teams responsible for microarchitecture, RTL design, verification, synthesis, place-and-route, and timing closure. Success requires strong collaboration across sites and functions, excellent communication, and the ability to thrive in a fast-paced, dynamic environment.

Key Responsibilities

  • Oversee RTL integration, functional verification, synthesis, P&R, and timing closure across global teams.
  • Contribute technically to RTL design and conduct in-depth reviews of IP development, design constraints, and verification/emulation plans.
  • Partner closely with software, analog, post-silicon validation, and test teams to optimize development cycle times.
  • Collaborate with marketing, architecture, and applications teams to define next-generation low-power wireless products.
  • Drive continuous improvement in design quality, methodology, and efficiency to achieve first-silicon-success tape-outs.
  • Work with firmware teams to enable robust software support for wireless products.
  • Align with IP vendors and internal stakeholders on technical requirements and roadmaps.
  • Mentor engineers to build deep subject-matter expertise within the organization.
  • Champion methodology enhancements for faster, higher-quality cycle times.
  • Foster cross-geography cooperation and a positive, inclusive team culture.

Requirements/Qualifications:

  • 15+ years of hands-on experience in SoC integration, RTL design (Verilog/SystemVerilog), and functional verification (UVM, assertions, coverage).
  • Bachelor's or Master's degree in Computer Science, Engineering or related field.
  • Proven expertise in microarchitecture, and implementation of microcontrollers and microprocessors.
  • Deep knowledge of low-power design techniques, complex power/analog subsystems, constraints, and timing closure.
  • End-to-end understanding of microcontroller development-from marketing requirements through pre-silicon, post-silicon validation, and production test.
  • Demonstrated success leading tape-outs with distributed, cross-geography teams.
  • Proficiency with industry-leading SoC EDA tools and flows.
  • Familiarity with Functional Safety (FuSa) and cybersecurity standards for embedded products.

Travel Time:

0% - 25%

Physical Attributes:

Hearing, Seeing, Talking

Physical Requirements:

80% sitting, 10% walking , 10% standing

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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